CPU time and Memory Stall

Cache Performance

Last time: intro, idea of CPU time for a program. Cache miss is “lost time” to the system, counted officially as “CPU time” since it’s handled completely by the CPU. The CPU just rates as slower because of all the cache misses.
We see it’s all up to the CPU to manage the bus and access to main memory. Here’s the breakdown:
°         CPU time = (CPU exec clock cycles + memory stall cycles) * clock cycle time
°         Memory stalls = read stalls + write stalls
°         CPU time = (CPU exec clock cycles + memory stall cycles) * clock cycle time
°         Memory stalls = read stalls + write stalls
°         Read stall cycles = reads per program * read miss rate * read miss penalty
°         Write stalls for write-through
          write stall cycles = Writes/program * write miss rate * write miss penalty + write buffer stalls
          Write stalls for write-back: more complicated, defer
°         Write buffer stalls are usually small so can ignore
°         Assume read miss penalty = write penalty (read a block for either case)
Then memory stall cycles = read stall cycles + write stall cycles
 = reads/program*read miss rate * miss penalty + writes/program* write miss rate * miss penalty
= (reads/program*read miss rate  + writes/program * write miss rate)*miss penalty
reads/program*read miss rate  + writes/program * write miss rate = missed accesses/program = miss rate * (accesses/program)
So memory stall cycles = memory accesses/program * miss rate * miss penalty
= instructions/program * misses/instruction * miss rate * miss penalty  (pg. 476)

(Miss penalty expressed in #clock cycles)

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